The Intel (Altera) Cyclone V FPGA family is one of the newest members of the Altera line-up. While this is the first time many people see these boards publicly, they have been in use for quite some time. This article will look at what makes this part special and why it might soon replace other parts of Altera‘s current line-up.
What is Altera Cyclone V
The Altera Cyclone V is a family of low-power field-programmable gate arrays (FPGAs) manufactured by Intel (formerly Altera Corporation). Introduced in 2010, Cyclone V FPGAs provide a balance of low power consumption, performance, and cost for mid-range applications such as industrial automation, automotive infotainment, and digital displays.
Some key features of the Cyclone V family include:
- Low power consumption – Cyclone V FPGAs consume as little as 3 Watts static power thanks to Intels 40 nm process technology. This makes them suitable for battery-powered and green energy applications.
- Performance – With a maximum frequency of 300 MHz, Cyclone V delivers up to 220K logic elements (LEs) and 96 Mbits of RAM to meet the needs of mid-range applications.
- Cost-optimized – Pricing starts below $25 USD for high volume orders, providing an affordable option compared to higher cost FPGAs.
- DSP blocks – Up to 220 18×18 multipliers allow for digital signal processing in applications like motor control and software-defined radio.
- Multi-protocol communication – Support for protocols like Ethernet, USB, and PCIe allow for easy system connectivity.
- Partial reconfiguration – The ability to reconfigure part of the FPGA while the rest remains active can help reduce power consumption.
This combination of features has made the Cyclone V series a popular choice for industrial, medical, automotive, and consumer applications that require low cost and power efficiency.
Cyclone V Architecture
The Cyclone V architecture is built on a 40 nm process technology, which enables low static power consumption and a high logic density up to 220K LEs. The FPGA fabric consists of the following key components:
Logic Elements
The basic building block of Cyclone V FPGAs is the logic element (LE). Each LE consists of a 4-input look-up table (LUT) capable of implementing any 4-input logic function, along with a register to implement sequential logic. Cyclone V provides a abundant 120,000 to 220,000 LEs, allowing designers to synthesize complex logic functions.
Embedded Memory
Cyclone V provides approximately 10 Mbits of embedded memory blocks that can be used to implement FIFO buffers, RAM, and ROM functions within the FPGA fabric. Each device has between 160 to 594 M9K blocks, each block providing up to 9 Kbits of storage. For larger memory needs, Cyclone V also includes up to 16 Mbits of larger M144K blocks.
DSP Blocks
For digital signal processing functions, Cyclone V incorporates dedicated high-performance 9×9 multiply and accumulate DSP blocks. Each block can perform one 18×18 multiply accumulate operation per clock cycle. The larger devices in the family provide up to 220 of these DSP blocks.
Clock Management
Flexible clock management is critical for FPGAs, and Cyclone V provides up to 12 global clocks that can drive throughout the device. Each clock can be individually programmed for frequency synthesis, deskew, and dynamic phase shifting. There are also up to 88 low-skew routing clocks per device.
I/O
A wide variety of external interfaces can be implemented with Cyclone V I/O capabilities. Multi-voltage I/O banks support common standards like 3.3V LVTTL as well as 2.5V LVCMOS and 1.8V LVCMOS. High-speed inputs support data rates up to 1.6 Gbps. General purpose I/O provide flexibility for a wide range of applications.
Transceivers
For high-speed communications, selected Cyclone V variants incorporate up to four transceiver blocks. These multi-gigabit transceivers support data rates up to 6.5 Gbps for protocols like Ethernet, Fibre Channel, XAUI, and RapidIO. Each transceiver channel contains dedicated PLLs, clock data recovery, and channel alignment logic.
Configuration
Cyclone V can be configured using industry-standard methods like active/passive serial, JTAG, and AS configuration schemes. This allows the use of low-cost configuration devices and easy interfacing with common microprocessors. Partial reconfiguration is also supported for dynamically modifying sections of the FPGA while the rest continues operation.
Cyclone V FPGA Family
The Cyclone V family includes devices in four variants optimized for different applications:
- E – Mainstream low cost FPGAs
- GX – Transceiver variants with 2-4 transceiver channels
- GT – High performance transceiver variants with 6-16 transceivers
- SE – Lowest power optimized variants
Within each variant, different densities are available with different amounts of LEs, memory, DSP blocks, and transceivers. The following table summarizes the Cyclone V family specifications:
| Device | LEs | M9K Blocks | M144K Blocks | 18×18 DSPs | Transceivers |
|---|---|---|---|---|---|
| 5CEA4 | 60K | 241 | 4 | 66 | 0 |
| 5CEA7 | 110K | 468 | 4 | 132 | 0 |
| 5CEBA4 | 85K | 241 | 12 | 110 | 0 |
| 5CEFA4 | 120K | 241 | 12 | 132 | 0 |
| 5CEFA7 | 150K | 468 | 16 | 198 | 0 |
| 5CGXFC7 | 150K | 468 | 16 | 198 | 2 |
| 5CGXFC9 | 220K | 594 | 16 | 220 | 4 |
| 5CSEBA6 | 85K | 241 | 12 | 110 | 0 |
| 5CSEMA4 | 60K | 241 | 4 | 66 | 0 |
This range of densities allows designers to choose the optimal Cyclone V device to match their specific requirements. The highest density 5CGXFC9 provides a potent combination of logic, memory, DSP, and transceiver capability in a low power, cost-optimized package.
Cyclone V Development Kits
To simplify the design process, Intel provides a range of development boards and kits for Cyclone V FPGAs:
- Terasic DE1-SoC – Features a Cyclone V 5CSEBA6U23I7N FPGA with 85K LEs, along with ARM Cortex-A9 processor and video interfaces.
- Intel Cyclone V GX Starter Kit – Highlights the 5CGXFC9 transceiver capabilities with PCIe x4, SATA-II, and Gigabit Ethernet interfaces.
- Intel Cyclone V SE Starter Kit – Demonstrates lowest power operation with the 5CSEMA5F31C6 FPGA variant.
- Arrow SoCKit – Cost-optimized board with Cyclone V 5CSEBA6U23I7 FPGA SoC.
Using these kits, developers can start implementing and testing their designs with the Cyclone V hardware and software environment. The kits provide easy access to peripherals like memories, interfaces, switches, buttons, and displays. Many example designs and tutorials are available both from Intel and third parties to accelerate learning. Once a design is completed and tested, it can be migrated to a custom PCB for production.
Design Tools
To support Cyclone V developers, Intel provides a robust design environment:
- Quartus Prime – FPGA design software with support all major HDLs like Verilog and VHDL. Includes logic synthesis, place and route, timing analysis, power optimization and simulation tools.
- ModelSim – HDL simulator for verifying and debugging FPGA designs without hardware.
- Nios II EDS – For developing embedded software for the Nios II softcore CPU that runs within the Cyclone V fabric.
- Qsys – Tool for integrating intellectual property (IP) blocks into system-level designs.
- DSP Builder – High-level block diagram tool for developing DSP systems with the Cyclone V DSP blocks.
This suite of tools provides everything needed for a complete FPGA design flow from conception through verification and debug. The tools support simulation, synthesis, place and route, timing analysis, power optimization and programming of the final bitstream.
Applications
With its combination of low power, performance and cost, the Cyclone V family targets a wide variety of applications including:
- Industrial Automation – Programmable automation controllers, motor drives, robotics, and factory automation.
- Automotive – Infotainment systems, driver assistance, camera processing, USB connectivity.
- Consumer – Digital cameras, home automation, portable electronics.
- Medical – Diagnostic systems, ultrasound, imaging, healthcare IoT.
- Aerospace and Defense – Avionics systems, ruggedized electronics, radar processing.
- Wired Communications – Switches, routers, FTTx, optical networking.
- Wireless Communications – 4G/LTE infrastructure, baseband processing, small cells.
For these applications, Cyclone V provides an optimal balance of capability and power efficiency in a cost-effective design. The low power eases thermal design while maintaining the performance needed.
Some specific customer examples include:
- Glidecam – Portable camera stabilization system uses Cyclone V for control algorithms.
- Nutaq – Software-defined radio platform built on Cyclone V FPGA.
- Foxconn – High-volume manufacturing uses Cyclone V SoCs for quality control systems.
Comparison to Other FPGAs
Cyclone V is positioned between Intel’s low-cost Max 10 FPGA family and higher-end Arria series FPGAs in terms of price and performance:
Max 10
- Lower cost, power and performance
- Up to 50K LEs
- Single power supply 1.2V
- No transceivers
Cyclone V
- Mainstream cost/performance/power
- Up to 220K LEs
- Dual power supply 1.1V and 2.5/3.3V I/O
- Optional integrated transceivers
Arria V
- Higher performance, power and cost
- Up to 1.5M LEs
- Dual power supply 1.1V and 2.5/3.3V
- Up to 96 transceiver channels
Compared to competing mid-range FPGAs, Cyclone V differentiates with lower power consumption while maintaining high logic density and hard IP blocks for memory and DSP:
| FPGA | Power | LEs | DSP Blocks | Transceivers |
|---|---|---|---|---|
| Cyclone V | 3W | 120K-220K | Up to 220 | Up to 16 |
| Xilinx Artix-7 | 4W | 125K-275K | Up to 400 | Up to 16 |
| Lattice ECP5 | 3W | 52K-149K | 0 | 0 |
| Microchip PolarFire | 2W | 122K-200K | 240 | 16 |
Overall, Cyclone V hits a sweet spot between the capabilities, power efficiency and cost structure desired by many mid-range applications.
Conclusion
In summary, the Cyclone V FPGA family provides an optimal balance of low power consumption, performance, and cost for mid-range applications. Key capabilities include:
- Low power 40nm process technology.
- Up to 220K LE programmable logic.
- Embedded memory and DSP blocks.
- Optional integrated multi-gigabit transceivers.
- Mature design tools and IP ecosystem.
For industrial, automotive, consumer and communications markets needing energy efficiency and low cost, Cyclone V FPGAs are an excellent fit. With its high logic density, ample hard IP blocks, and aggressive power optimization, Cyclone V continues as a popular mid-range FPGA family.
Frequently Asked Questions
Here are some common questions about the Altera Cyclone V FPGA:
What process node is Cyclone V based on?
Cyclone V is manufactured on TSMC’s 40 nm low power CMOS process technology. This provides a good combination of density, performance and low static power.
What FPGA families are higher and lower than Cyclone V?
In Intel’s FPGA lineup, Cyclone V sits between the low cost Max 10 FPGAs and higher end Arria V FPGAs. Max 10 targets lowest cost while Arria V adds more performance and capabilities for high end applications.
What types of clock management blocks are in Cyclone V?
Cyclone V provides up to 12 global clocks that can drive throughout the FPGA. Each clock has individual clock control blocks with frequency synthesis, deskew, and dynamic reconfiguration. There are also up to 88 low-skew routing clocks per device.
How many I/O standards are supported by Cyclone V?
Cyclone V supports a wide range of I/O standards including 3.3V LVTTL, 2.5V LVCMOS, 1.8V LVCMOS, SSTL, HSTL, and differential standards. Multi-voltage I/Os allow interfacing to different voltage domains.
What configuration schemes can be used with Cyclone V?
Cyclone V supports active serial, passive serial, JTAG, and AS (fast passive parallel) configuration schemes. This allows low cost configuration solutions as well as processor-based configuration.
Cyclone V in Comparison to Other FPGAs
Cyclone V is available in all three of Altera’s technology nodes: Stratix 10 (10nm), Stratix 11 (16nm), and Stratix 12 (14nm). In the Stratix 10 technology node, this is at its smallest point. In addition, the Cyclone V adds 12-bit A/D converters, which is a new addition from the previous generation.
Stratix 11 and Stratix 12 have several differences between them in their Cyclone V offerings. Most notable is that Stratix 11 offers a 16-bit multiplier block with both add and divide functionality. On the other hand, Stratix 12 only offers a 16-bit multiplier block that does not have any add or divide functionality. Additionally, Stratix 12 offers a 16-bit multiplier block with only add functionality. But Stratix 11 offers both add and multiply functionality.
The other change is that Stratix 11 does not support on-chip memory while the other two do. However, since we know that this is due to the manufacturing of Stratix 11 on TSMC’s v10 60nm process while we make the other two on TSMC’s 10nm node, it is still unclear whether this is true.
The Cyclone V also differs from the previous Cyclone IV parts in that the memory interface is in a different location. They moved it off the FPGA chip itself and put on an L4 device called the C5N. This allows for better routing between FPGA companies.
Cyclone V Information
The Cyclone V family has three different models, broken down by technology node, and these are 10LX, 10LX-S, and 10SS. The 10LX-S has a data rate of 60MHz, while the other two have a 40MHz data rate. Both have 16GB of onboard FLASH memory, while the C5N has up to 192GB of external memory.
The online documentation for this part is available at the CFE (Component Firmware Engine). The documentation includes a full pin-out of the part as well as device-specific information. It also includes a full description of the onboard memory built on a 10nm process. You can lock the FPGA from 100MHz to 400MHz, and the C5N from 100MHz to 400MHz
The latest version of Quartus II is Q2 2017 SP1, allowing Altera users to access Cyclone V within their systems.
Intel (Altera) Cyclone V FPGA Boards features
Features of the Intel (Altera) Cyclone V FPGA Boards include:
Cyclone V Architecture
36 customizable Digital Input/Output (I/O) blocks + 6 clock I/O blocks. The new Integrated Memory Controller (IMC) provides both on-chip and off-chip memories. It has 56-bit wide multipliers with multi-precision support.
Hardware FPGA Firmware for advanced security, intelligent routing, power management, and advanced programmable logic functions. Support for advanced bytewise programming operations such as Array Interleaving and Inline Operation.
Advanced tools for automated design and verification
Performance improvements on or above the previous generation
Cyclone V has more I/O pins than the rest of the Altera FPGA families. It allows for the combination of more FPGA devices. So there are no pluggable daughter boards. The board supports 8GB of onboard FLASH memory, which we can use as on-chip or off-chip memory.
Flexible Interface Support
Cyclone V has multiple options for interfacing to the C5N with speeds up to 10Gbps. There are four QSGMII transceivers, which are useful for gigabit ethernet. It also supports four SGMII transceivers used for serial communications protocols such as PCI Express Gen 2.
This FPGA has an integrated serial transceiver with multiple options for interfacing up to 10Gbps. Thus, it is useful for high-speed serial communication protocols such as PCI Express Gen 3.
Abundant Hard IP
There are over 120 IP blocks for easy integration of the Cyclone V into an application. The various Altera FPGA families have different IP blocks, but they are all available in Cyclone V.
Slice-based FPGA Architecture
Cyclone V slices its array into 64 slices. This means that the entire array is smaller than a regular FPGA part. But it still has all the functionality that Altera’s current FPGA chips provide.
Design Security
There is a hardware-based security mechanism, which we can use to prevent writing to data that may need erasing. This hardware protection is separate from the software control over who has access to the various bits within the FPGA.
The Cyclone V has a 128-bit hardware-based data integrity checker. It ensures that the part will output the same results as it would if you hand-programmed it manually. The checker uses a look-up table for this purpose.
Connectivity
The Cyclone V has an on-chip Ethernet controller with functionality for gigabit ethernet, 10GBase-T Ethernet, and PCI Express Gen 2. In addition, the serial transceiver supports SGMII, QSGMII, PCI Express Gen 2, and other serial interfaces.
A GPIO interface on the Cyclone V provides a standard set of inputs and outputs for connecting to other FPGAs. We can use this interface to connect to other chips with the right signals.
The Cyclone V also has a USB 3.1 controller that is capable of up to 20Gbps. We use eight FSMC USB controllers for wireless communication using protocols such as Bluetooth and Wi-Fi. The board also has two CAN controllers for communicating over CAN Bus networks.
Multiport Memory Controller
The on-chip memory has two ports, allowing it to interface with external memories using two different protocols. It allows for using the part in applications that require high-speed block-level access to external memory. So it makes it useful for cloud computing or scientific analysis applications.
Extended Power Management
The Cyclone V has extensive power management functionality. As a result it allows greater flexibility in system design. For example, it can alter its clock frequency based on current operating conditions. Also, it disables unused modules to control power consumption. It is compatible with the USB 3.1 SuperSpeed Plus standard for up to 20Gbps data transfer speeds.
Cyclone V also has “Embedded Debug Support.” It provides on-chip debugging functionality at low power consumption. We can use it to debug applications embedded in the FPGA, which is ideal for debugging.
Silicon and Architectural Optimizations
Several silicon and architectural optimizations are products of Cyclone V. These include a different set of memory control blocks. They allow the device to run faster and with less power. There is also a larger set of multipliers, which can optimize the FPGA’s performance.
10LX-S – The 10LX-S has a data rate of 60MHz while the other two have a 40MHz data rate.
Benefits of using Intel (Altera) Cyclone V FPGA Boards
The main advantages of using an Intel (Altera) Cyclone V FPGA Boards are as follows:
Tailored for High-Volume, Cost-Sensitive Applications
The Cyclone V is the lowest cost FPGA from Altera’s FPGA line-up. This makes it ideal for applications that need a large amount of I/O but don’t have a lot of space available to put the FPGA device. In addition, it includes applications such as networking and other large high-speed communications.
Flexible Integration Options
There are several options for integrating the Cyclone V into a system using Altera’s standard tools. There are four QSGMII transceivers, which we use for ethernet and other networking applications. We also use four SGMII transceivers for serial communications protocols such as PCIe Gen 2 and various network protocols.
Versatile Design
The Cyclone V has many different options for interfacing with other chips. There are four QSGMII transceivers, which we use for ethernet and other network applications. There is also a set of eight FSMC USB transceivers that are useful for USB 3.1 communication.
Tailored for High-Performance Designs
The Cyclone V has numerous performance features that allow its optimization for high-performance applications where the main limitation is the size of the FPGA part. The Cyclone V has a hardware-based checker, which makes it more secure. It runs at a higher speed than previous Altera FPGA parts. The Cyclone V also has larger multipliers. So, it allows the Cyclone V optimization for many different applications.
SoC FPGAs–Your Customizable ARM* Processor-Based SoC
The Cyclone V is an ARM* processor-based FPGA that allows you to implement an ARM system on a single chip. It is a member of the Cyclone family. In other words, it provides a full set of FPGA blocks and IP for implementing most ARM processor functions. It includes the entire memory subsystem, I/O subsystem, and peripheral control. We can use the Cyclone V in an end-to-end design where we place it after the ARM core and before the rest of the SoC device.
Reducing Total System Cost through Integration
Cyclone V can reduce the cost of a system by replacing many discrete components in an SoC. They include the main processing core, memory, DSP, display controller, and other peripheral chips. This approach is attractive to leading companies such a RayMing PCB and Assembly that are looking for a way to reduce the total system cost.
End-to-End System Design
We can use the Cyclone V in an end-to-end design where it’s placed after the ARM core and before the rest of the SoC device. Other FPGAs provide all processing blocks required to implement an ARM SoC with all peripherals, memory, DSP, and I/O devices.
Industry-Leading Low Power and Low System Cost
Cyclone V uses the same high-performance architecture as other Altera FPGAs, such as the FLEX series. It has a 3.1V core voltage and runs at a 200MHz clock speed. The Cyclone V gives you many benefits of an all-FPGA design while also improving its performance. It uses advanced IP blocks in the FPGA, designed especially for low-power applications.
High-Bandwidth Interconnect
Cyclone V provides high bandwidth interconnects between the blocks within the FPGA. It is useful in applications where you need to transfer large data. Such data include image processing and other signal processing applications.
Cyclone V has four QSGMII transceivers used for data communication over ethernet networks, with data transfer speeds of up to 200Mbits/s. One can transfer data simultaneously, which is useful when reading or writing to flash memory in the FPGA.
ARM*-Based HPS
Cyclone V also has an HPS field-programmable gate array (HPS) block. ARM designed the block, but we can program it in the FPGA. The HPS is essential in off-chip applications by connecting the output of the QSGMII transceivers to an optional Cypress XC7K35P1. In addition, it provides a memory interface for ARM’s HPS.
Intel (Altera) Cyclone V FPGA Boards drawbacks
Although the Cyclone V is a low-cost FPGA, it still offers many benefits that other FPGAs do not. The main drawbacks include:
- The 1Gbit/s QSGMII transceivers, the FSMC USB transceivers, and the HPS are not available. So, you can’t use them to implement certain types of end-to-end designs.
- There is no support for non-ARM systems. It includes AMD or ARM-based systems that one implements using a PCIe switch or other high-performance interfaces between the ARM core and the rest of the SoC.
- Cyclone V doesn’t support DDR memory directly. However, it has a connector for using an optional XC7K35P1 memory device designed for use with the QSGMII transceivers and the HPS.
- There is only one SGMII transceiver and one USB transceiver in the FPGA. You can’t add more of these transceivers to interface with more peripherals on an SoC design.
Although the Cyclone V has many drawbacks, it is still a very powerful FPGA that we can use in many different systems.
Intel (Altera) Cyclone V FPGA Boards applications
We optimize the Cyclone V for FPGA designs that use the ARM CPU. The following are some examples of systems that you can implement using Cyclone V:
1. Industrial networking, motor control
Industrial network systems are useful in many different environments. It includes factory automation, building automation, and mining. Cyclone V provides high-performance networking capabilities for industrial network systems. The QSGMII transceivers can connect the FPGA to the ethernet, which is essential for communication with other systems. Cyclone V can also implement motor control systems used within factory automation and building automation.
2. Wireless: Mobile backhaul, remote radio heads, picocell
Mobile backhaul systems are essential in cellular communication systems. It includes a wireless backhaul to the base station, which we connect to an ethernet switch. We can use Cyclone V to provide high-performance communication capabilities in these environments. The QSGMII transceivers are useful in data communication over the wireless network. But the FSMC transceivers are essential radio energy transmission or reception. Cyclone V can implement remote radio heads used in the field inside mines and other underground locations.
3. Wireline: Access routers, control plane
We can use Cyclone V in high-performance wireline routers that are useful in cellular networks. These routers are in the base station and connect the communications device to the network. The QSGMII transceivers can help data communication over the wireline network.
4. Broadcast: Capture cards, video conversion
The Cyclone V provides high performance for video conversion applications. It can help implement digital broadcast capture cards, which we use in analog broadcast television, satellite television, and IPTV systems. It can also convert analog low-definition television into digital high-definition television or other types of videos.
5. Cryptography
The Cyclone V is a secure processor that uses an ARM core for data processing. We can use it in applications that require high-performance encryption algorithms. You can use the HPS to provide an interface compatible with ARM’s processors, such as the Cortex-A8 and Cortex-A9.
6. Consumer: Displays
The Cyclone V is useful in consumer applications, such as digital TVs, home theater systems, and e-book readers. We can also use it in low-power embedded systems that include large displays.
7. Security
Affordable hardware security solutions are essential for secure communications between devices and networks today. The Arm Cortex-A8 is a highly integrated processor system used in many high-performance devices due to its high performance and low power consumption.
8. automotive: Infotainment, drive assistance, battery management
Cyclone V is a completely programmable system that we can customize to perform certain tasks in a system. The QSGMII transceivers help connect the FPGA to a high-performance network. We can use it in applications that require powerful processing capabilities, such as multimedia applications. The HPS is essential in applications where we need a memory interface with an ARM-based system.
Intel (Altera) Cyclone V FPGA Boards
[ACM-027] Altera Cyclone V FPGA board
ACM-027-A4 consist of the Altera 5CEBA4F23C8N FPGA with the following specifications:
- 100 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device
- 16 Global Clock Networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383 Kbits Embedded memory
- 49K Logic Elements
[ACM-027Z] Altera Cyclone V FPGA board
The ACM-027Z-A4 Is compact and straightforward, using a 3.3V power supply operation. The specification for the Altera 5CEBA4F23C8N FPGA includes:
- 100 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383 Kbits Embedded memory
- 49K Logic Elements
[ACM-028] Altera Cyclone V F896 FPGA board
The ACM-028 consist of the Altera 5CEFA9F31C8N or 5CEFA7F31C8N. This FPGA Cyclone V board is straightforward and compact and offers high performance. Some of the specifications include:
5CEFA7F31C8N:
- 100 Maximum user I/O pins (Board)
- 480 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 7 PLLs
- 312 Embedded 18 x 18 Multipliers
- 7,696 Kbits Embedded memory
- 149.5 K Logic Elements
5CEFA9F31C8N:
- 100 Maximum user I/O pins (Board)
- 480 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 8 PLLs
- 684 Embedded 18 x 18 Multipliers
- 13,917 Kbits Embedded memory
- 301K Logic Elements
[ACM-109] Altera Cyclone V FPGA board
The Altera 5CEBA4U15C8N FPGA consists of the following attributes:
- 128 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global clock networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383kb Total Memory
- 303kb MLAB Memory
- 3,080kb M10KMemory
- 18,480 ALM
- 49k Logic Elements
[ACM-113] Altera Cyclone V GX FPGA board
The ACM-113 family consists of 5CGXFC7B7F23C8N, 5CGXFC5B7F23C8N, and 5CGXFC3B7F23C8N Cyclone V GX FPGA.
Their specification include:
5CGXFC7:
- 128 Board Maximum user I/O pins
- 240 Device Maximum user I/O pins
- 7 PLLs
- 312 18×18 Multipliers
- 6,860kb M10K Block
- 150k Logic Elements
5CGXFC5:
- 128 Board Maximum user I/O pins
- 240 Device Maximum user I/O pins
- 6 PLLs
- 300 18×18 Multipliers
- 4,460kb M10K Blocks
- 77k Logic Elements
5CGXFC3:
- 128 Board Maximum user I/O pins
- 208 Device Maximum user I/O pins
- 4 PLLs
- 114 18×18 Multipliers
- 1,350kb M10K Blocks
- 36k Logic Elements (k)
[ACM-206] Altera Cyclone V FPGA board
The ACM-206 family consists of 5CEFA9F31C8N and 5CEFA7F31C8N ALTERA Cyclone V FPGA.
Their specification include:
5CEFA9F31C8N
- 684 Embedded multipliers
- 16 Global Clock Networks
- 13,917Kbits Embedded memory
- 296 Board Maximum user I/O pins
- 224 Device Maximum user I/O pins
- 8 PLLs
- 301K Logic Elements
5CEFA7F31C8N:
- 312 Embedded multipliers
- 16 Global Clock Networks
- 7,696 Kbits Embedded memory
- 296 Board Maximum user I/O pins
- 240 Device Maximum user I/O pins
- 7 PLLs
- 149.5K Logic Elements
[ACM-305] Altera Cyclone V FPGA board
Like all the other Cyclone V boards made in Japan, it had High quality eight layers and a ten-pin socket JTAG Connector. The Altera 5CEBA4U15C8N FPGA has the following attributes:
- 56 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 4 PLLs
- 3,383kb Total Memory
- 303kb MLAB Memory
- 3,080 kb M10K Memory
- 18,480 ALM
- 49K Logic Elements
- 132 18 x 18 Multipliers
[ACM-305Z] Altera Cyclone V FPGA board
This board is a Hi-performance FPGA Cyclone V board that is very simple and compact. The Altera 5CEBA4U15C8N FPGA has the following feature:
- 56 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383 Total Memory
- 303kb MLAB Memory
- 3.080kb M10K Memory
- 18,480 ALM
- 49K Logic Elements
[AP68-07] Altera Cyclone V PLCC68 FPGA Module
With AP68-07, you will get 68pin PLCC FPGA that is simple and compact. The Altera 5CEBA4U15C8N has the following specification:
- 50 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global clock networks
- 4 PLLs
- 132 18 x 18 multipliers
- 3,383kb Total Memory
- 303kb MLAB Memory
- 3,080 kb M10K Memory
- 18,480 ALM
- 49K Logic Elements
[AP68-06Z] Altera Cyclone V PLCC68 FPGA Module
The Altera 5CEBA4U15C8N has the following features:
- 50 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global clock networks
- 4 PLLs
- 132 18 x 18 multipliers
- 3,383kb Total Memory
- 303bk MLAB Memory
- 3,080kb M10K Memory
- 18,480 ALM
- 49K Logic Elements
[EDA-008] Altera Cyclone V USB-FPGA board
Altera 5CEBA4F23C8N FPGA:
- 100 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383KB Embedded memory
- 49K Logic Elements
[EDA-009] Altera Cyclone V USB-FPGA board, FTDI USB 3.0 FT600
Altera 5CEBA4F23C8N FPGA:
- 100 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383 KB Embedded memory
- 49K Logic Elements
[EDA-302] Altera Cyclone V USB-FPGA board
Altera 5CEBA4U15C8N FPGA:
- 56 Maximum user I/O pins (Board)
- 224 Maximum user I/O pins (Device)
- 16 Global Clock Networks
- 4 PLLs
- 132 18 x 18 Multipliers
- 3,383kb Total Memory
- 303kb MLAB Memory
- 3,080kb M10K Memory
- 18,480 ALM
- 49K Logic Elements
Conclusion
The Cyclone V is the first FPGA Altera has produced that supports high-speed digital design. It allows for several high-speed applications. The 10SS can handle up to 60MHz of data, while the other two only support 40MHz.
From the above details, all variants support 16GB, 32GB, and 64GB of onboard memory. While this is not enormous compared to the typical DRAM found on modern systems, it will easily implement typical designs.
While there are limitations on the number of environmental effects allowed for this device, it does not appear to be much below what we find in modern FPGAs.
