High Speed PCB Design Guidelines You Must Know

Introduction

With increasing signal speeds and complexity of electronic systems, high speed design considerations have become critical for modern PCBs. High speed signals bring unique challenges like signal integrity, EMI/EMC and power integrity issues. This article provides key guidelines that PCB designers must follow to develop robust and optimized high speed PCBs.

Signal Integrity Guidelines

Maintaining signal integrity is paramount for error-free functioning of high speed digital circuits. Some guidelines:

Controlled Impedance Routing

• Use impedance controlled routing for clock and critical data lines. This matches trace impedance to driver/load impedance.
• Target impedance value is generally 50Ω or 75Ω differential.
• Avoid impedance mismatches that cause reflections and ringing.

Minimize Stub Lengths

• Keep stub lengths very short (< 50 mils ideal) on controlled impedance traces to avoid impedance discontinuities.
• Route signal line directly between driver and receiver with no stubs.

Vias

• Minimize the number of vias which introduce discontinuities.
• Use filled vias to provide a continuous reference plane.

Layer Stacking

• Adjacent signal layers must have reference planes to provide return paths.
• Route critical signals on layers close to reference plane.

Differential Routing

• Use differential signaling for clocks and fast data buses.
• Maintain 100Ω differential impedance and intra-pair skew < 30ps.

Terminate Transmission Lines

• Properly terminate controlled impedance lines at endpoints to avoid reflections.

Route Clock and Data Differently

• Avoid running clock parallel to data lines. This can cause coupling noise.
• Route clock orthogonally to data lines if possible.

Component Placement

• Place components with T-topology routing in mind.
• Group associated circuits together.

Power Integrity Guidelines

Robust power distribution is needed to maintain clean power supplies for high speed ICs. Key guidelines:

Decoupling Capacitors

• Use sufficient decoupling capacitors close to each IC power pin.
• Values in range of 0.1μF to 10μF are typical. Mix of values provides wide frequency decoupling.
• Ground vias must be placed right next to decoupling capacitors.

Power Planes

• Use entire layer(s) for uninterrupted power and ground planes.
• Power planes provide very low impedance power distribution.

Power Distribution Network (PDN)

• Design a solid power distribution network starting from voltage regulators to board power entry point.
• Model the PDN impedance from DC to higher frequencies.

Separate Analog and Digital Supplies

• Keep analog and digital power supplies separate to avoid coupling noise.
• Use ferrite beads, common mode chokes and PI filters to isolate.

Board Stackup

• Ensure power layer is adjacent to signal layer to provide referencing.
• Do not fragment the planes due to routing.

Power Islands

• Create multiple power islands in large designs with isolated power zones.
• Provides better decoupling due to localized capacitors.

Electromagnetic Interference Guidelines

EMI must be minimized so that the electronics device does not cause interference and also is not susceptibile to external interference sources.

Route Clock and Data Orthogonally

• Clocks couple strongly to data lines running in parallel over long distances.
• Routing them orthogonally reduces this coupling.

Shielding

• Use shielded enclosures to contain EMI emission.
• Provide shielding around sources like oscillators, PLLs, high speed connectors.

Differential Signals

• Use differential signals which have lower EMI compared to single-ended signals.
• Twisting differential pairs reduces loop area further lowering emissions.

Spread Spectrum Clocking

• Modulate clock frequency across a narrow band to spread spectrum.
• This lowers peak emissions significantly.

Continuous Return Path

• The reference planes provide continuous return path for signals.
• Any split or gap in the planes causes common mode radiation.

Board Edge Clearance

• Maintain adequate clearance from board edges to contain EM fields inside the board area.

Series Termination

• Adding series resistor termination dampens signal overshoot.
• Lower overshoot reduces high frequency harmonic content and emissions.

Stackup and Layer Planning

A robust stackup is fundamental for routing high speed signals with proper impedance control and EM field containment.

Reference Planes

• Place reference/ground planes close to each adjacent signal layer.
• This provides return current path and controlled impedance environment.

Differential Layer pairing

• Place differential signal layers together and adjacent to a reference plane.
• Allows differential impedance control.

Critical Signals Inner Layers

• Important clocks and high speed data buses should be routed on inner layers.
• Inner layers are better shielded from external noise coupling.

Stackup Symmetry

• Maintain identical dielectric thickness between signal and reference layers everywhere.
• Any asymmetry causes variation in designed impedance.

Total Layer Count

• Have adequate layers to route signal-plane-signal-plane.
• Typically 8+ layers needed for complex high speed designs.

Material Selection

• Choose materials like FR-4 with tight dielectric properties control to minimize impedance variations.
• Low loss materials improve signal integrity at higher frequencies.

Component Selection

Component selection is also key for high frequency performance.

ICs

• Select ICs designed specifically for high speed applications.
• Ensure drive strength and input impedance match the trace impedance.

Passive Components

• Use tight tolerance low ESR/ESL capacitors like X7R, NP0/C0G types.
• Choose zero-delay resistors for termination.
• RF/microwave capacitors and inductors for RF circuits.
• Wideband transformers for isolation.

Connectors

• High speed connectors with impedance control and shielding.
• Minimize stub lengths.
• Backplane connectors for rack designs.

Conclusion

Designing for high frequency performance requires attention to signal, power and EMI/EMC integrity from the early architecture stage through schematic capture, simulation and PCB layout. Leveraging guidelines around impedance control, stackup, routing and component selection enables developing optimized PCBs that can handle multi-GHz signals reliably. A rigorous validation workflow including signal integrity simulations, power integrity analysis, pre-compliance EMI testing and design reviews is key to implementing these best practices effectively.

FAQs

1. What is the typical dielectric thickness used for a 50Ω controlled impedance trace?

For FR-4 material with Er=4.5, the common dielectric thickness for 50Ω trace over reference plane is around 60-65 mils.

2. What are some PCB materials used for high speed design?

FR-4, polyimide, PTFE composites, liquid crystalline polymer (LCP) and ceramic-filled PTFE substrates are common.

3. How to avoid common mode currents on differential pairs?

Using wider traces, thicker dielectric under traces, ground guard traces, cross-hatched ground planes reduces common mode conversion.

4. What is the typical intra-pair differential skew target?

For differential signals up to 25Gbps, the target intra-pair skew is less than 30ps while above 25Gbps skew less than 15ps is recommended.

5. Why are series terminations used?

Series resistors dampen signal overshoot and undershoot thereby controlling EMI emissions and also preventing signal integrity issues.

Tips to Generate the Best High-Speed PCB Layout

As of the 21^st century, most printed circuit boards in the market tend to face some kind of signal integrity issue that experts associate with HSDD or simply high-speed digital designs. HSDD and layouts tend to focus solely on generating PCB layouts that aren’t susceptible to SI (signal integrity), EMI (electromagnetic interference), and power integrity issues. Even though no PCB design comes fully rid of these issues, by following the guidelines in this article about high-speed printed circuit board layout, you can generate a PCB that has lower SI, EMI, and power integrity issues. Doing so will give your printed circuit boards better performance and hence give you an upper hand in this competitive market. But how can you achieve this feat? How can you make your high-speed PCB layout more efficient? And is this boost worth it?

After generating your PCB schematic and you are ready to move on to the PCB layout phase, you will need some leverage some specific features in the printed circuit board design tool to achieve impeccable routing. Moreover, in the printed circuit board designing software, you can adequately prepare your ground and power plane arrangement in the layer stack-up. Furthermore, you will get a chance to calculate your trace’s impedance control and also view the printed circuit board’s materials options. Almost every aspect of a high-speed PCB layout revolves around routing and the circuit board stack-up design. That is because these two factors provide power and signal integrity to the printed circuit board. Moreover, using the perfect ECAD software will also take you a long way in terms of achieving a successful high-speed PCB layout.

The Basics of High-Speed PCB Layouts

High-speed designs generally refer to the systems that utilize HSDS (high-speed digital signals) to effectively pass information from one component to another. The simple aspect separating a high-speed PCB layout and a standard printed circuit board layout with a relatively slow digital protocol is blurry.

Experts utilize a metric known as edge rate to specify that a specific system or systems are “high speed.” However, most digital PCB designs use both fast-edge (high speed) and slow-edge (low speed) rate digital protocols to generate a printed circuit board.

In the modern era, or the era of IoT and embedded computing, most, if not all, high-speed PCBs have a radio frequency end for networking and wireless communication.

Although every PCB design begins from a simple schematic, a significant part of designing a high-speed printed circuit board layout is solely focused on the following:

• Printed circuit board stack-up design
• Routing
• Interconnect design

If you succeed in the last two areas, you will likely also succeed in the first.

Planning for High-Speed Printed Circuit Board Impedance and Stack-up

Generally, the printed circuit board stack-up you generate for your high-speed PCB will determine your board’s routing and impedance. All printed circuit board stack-ups tend to include specific layers which are solely dedicated to:

• Ground planes
• Power
• And high-speed signals

Moreover, when assigning layers in the circuit board’s stack up, you will consider the following points:

Net Count and Board Size

How many nets will you be routing in the printed circuit board layer, and what size will the PCB be at the end of the manufacturing process? Generally, a physically large PCB might bear sufficient space to let you route throughout your printed circuit board layout without utilizing more than a couple of single layers.

Routing Density

If a case arises where you have a small board size and the net count is high, you might not have sufficient room for proper routing around the board surface area. Therefore, you will need more ISL (internal signal layers) when you push the board’s traces close together. Moreover, leaning towards a small PCB size can ultimately force high routing density.

Number of Interfaces

Generally, in most cases, routing a couple of interfaces, say one or even two per layer, can work as a perfect strategy depending on the following:

• The bus’s width (parallel versus series)
• The size of the printed circuit board

RF Signals and Low Speed

Will your printed circuit board digital design entail any RF or low-speed digital signals? If so, this component might take up crucial space on the board’s surface that could otherwise go into high-speed components and buses. Therefore, you might end up needing an extra internal PCB layer.

Power Integrity

The most significant cornerstone of PI (power integrity) is the utilization of ground planes and power planes for every voltage level needed in large integrated circuits. You should place these components on adjacent layers. Doing so will ensure high plane capacitance which will ultimately lead to the support of stable power.

Printed Circuit Board Material Options, Thickness, and Layer Count

Before you generate your high-speed PCB stack-up, consider the LC (layer count) you will need to insert into the board to accommodate every SD (digital signal) in the board design. You can effectively utilize several methods to figure this out. However, these techniques rely on two crucial factors:

• Mathematics
• Experience – you should have some experience in the art of high-speed PCB layouts

Moreover, the following factor can also impact the layer count of your circuit board:

• Large and high-speed integrated circuits with LGA/BGA footprints

When working with a BGA fanout on your PCB, you can generally fit around two rows per SL (signal layer). However, you should also include the ground and power plane in the LC when generating the PCB stack-up.

You can generally utilize FR4-grade components in the high-speed printed circuit board designing phase as long as the specific routes between various components aren’t too long. However, if the particular routes become too extensive, the PCB might experience excessive loss in the high-speed channels. Moreover, this factor might lead to the elements on the receiver’s end not being able to recover the signals effectively.

However, the most crucial property to consider when choosing the suitable materials for your high-speed printed circuit board must be the LT (loss tangent) of the high-speed printed circuit board laminates. Moreover, the geometry of the channels will also effectively determine the losses in the circuit board. However, choosing to go with low-loss tangent FR4 laminates can lead to a more reliable high-speed printed circuit board.

Specialized components

But if the routes in the board are too extensive, you might need more specialized components to utilize as the substrates to your high-speed signals. When LIL (low insertion loss) is required, but the routes are too extensive, you can use the following components to support sizeable high-speed printed circuit boards:

• Spread glass laminates
• PTFE-based laminates

A perfect high-tg entry-level set of laminate components for small-size high-speed printed circuit boards is generally 370 HR. Therefore, you should always check with the printed circuit board fabricator to ensure that your proposed stack-up and material selection is manufacturable before moving on to the next phase.

Impedance Control

Generally, you can only determine impedance after you have generated your proposed PCB stack up and after validating the stack up with your PCB fabricator. The fabricator might propose some specific modifications to the printed circuit board stack up; for example, they might suggest that you utilize alternative printed circuit board materials on your design or ask you to adjust the thickness of your printed circuit board. After receiving clearance from your fabricator, you can move on to the impedance calculation phase.

Generally, you can use a calculator (which uses a field solver) or a formula to calculate impedance. Impedance determines the board transmission line’s dimensions and the gap between the ground plane or power layers. Moreover, you can determine the width of the TL (transmission line) with multiple tools, which include the following:

Ø 3D/2D field solver

Generally, you can use a field solver to solve the Maxwell equation within the TL geometry you will define for your PCB.

Ø Waddell’s formula and IPC-2141

These crucial formulas offer an essential starting point for the estimation of impedance. However, they only generate accurate results at relatively lower frequencies.

Therefore, utilizing layer stack managers with field solvers will help you get more accurate results. Moreover, these managers also account for differential pairs, asymmetric line arrangement, etching, and copper roughness when generating impedance. After calculating your board’s impedance, the manager then sets design rules in your PCB routing tools. These rules make sure that your traces have impeccable impedance for optimal performance.

Most, if not all, high-speed signal protocols, for example, Ethernet or PCIe, utilize differential pair routing. Therefore, you need to generate your high-speed printed circuit board layout to a particular impedance by effectively calculating spacing and trace width. Field solvers are generally the best tools to utilize for calculating impedance (differential impedance) in most if not all, geometries (coplanar, strip-line, or microstrip). Other crucial results from field solver utilities include propagation delay, which you can utilize during the routing process of the high-speed printed circuit board to effectively enforce length tuning.

Floor-planning High-Speed Printed Circuit Boards

When it comes to high-speed printed circuit board layout, no standards or rules exist for where various electrical components should be positioned. However, it is generally a great idea to position the largest CP (central processor) integrated circuit near the board’s center since it will need to interface effectively with most of the components on the printed circuit board. For the smaller integrated circuits that directly connect with the CP, you can position them around the central integrated circuit to ensure routing between various components is kept direct and short. You can then place other peripherals around the circuit board to offer the needed functionality.

After placing the components, you can then set up the printed circuit board designing tool to assist you in terms of routing the board’s design. Though most people take this step lightly, you should note that it is a crucial phase in designing high-speed printed circuit boards since incorrect routing can inevitably ruin the signal integrity of the entire circuit board.

However, if you complete earlier steps correctly, then you can achieve signal integrity much more easily. But remember that you should set the impedance profile in the printed circuit board design rule such that every route in the circuit board design is effectively placed with the proper:

• Spacing
• Clearance
• Width

Getting all these factors correct will ensure that you maintain controlled PCB impedance during the routing process.

Power Integrity, Signal Integrity, and Routing

Signal integrity (SI) begins when you develop a PCB design with a specific impedance value, and then you maintain that impedance throughout the routing and layout phases. Moreover, you can also apply the following strategies to ensure impeccable signal integrity in your high-speed printed circuit board:

• Maintain a simple list containing the nets and buses that need length matching. Doing so ensures that you can effectively apply tuning structures to eliminate skewing.
• Utilize rough crosstalk simulation or calculation to effectively the appropriate spacing in between networks in the printed circuit board layout.
• Consult with the printed circuit board fabricator to identify the perfect processes and materials that can assist you in terms of avoiding the fiber weave effect.
• Prevent SR (signal reflection) by paying impeccable attention to the need for any or all termination resistors. You can utilize your datasheet to identify any on-die terminations in your high-speed PCB layout.
• Eliminate unwanted stubs on high-speed lines, for example, 10G Ethernets using back drilling.
• Minimize routing by using Vias. Generally, utilizing around two vias out of and into internal layers will help you minimize routing effectively.
• Aim to achieve shorter routes between various electronic components in your high-speed printed circuit board to ensure impeccably high-speed signals.

To comply with the best practices of developing high-speed PCB layouts and designs, you should encode these simple yet crucial rules on your routing tools.

Routing in High-Speed Printed Circuit Boards

The designing rules that you set whenever you are generating a high-speed PCB design, will make sure that you effectively meet your required impedance, length, and spacing targets as you successfully route your PCB design. Moreover, you can also enforce crucial rules in DPR (differential pair routing) in the routing process. Doing so will help you minimize length mismatches that tend to occur, which will ultimately help you prevent skew. Additionally, enforcing spacing between various traces in your circuit board will also ensure that you meet the target differential impedance. By using the perfect routing tools, you can encode every trace geometry limit associated with your PCB and turn them into design rules that will help you achieve a high-performance printed circuit board.

The most crucial point in high-speed printed circuit routing is the placement of GP (ground planes) near the board’s traces. Moreover, you should construct the board’s layer stack such that it has its ground planes in specific layers which are adjacent to the ICS (impedance controlled signals). Doing so will ensure you maintain consistent impedance and define clear return paths in the printed circuit board layout.

However, it would help if you didn’t route traces over split or gaps in the board’s ground planes for you to avoid impedance discontinuity that generates an electromagnetic interference problem. GP placement is not limited to ensuring proper signal integrity. Moreover, proper GP placement plays a significant role in power integrity by ensuring stability in power delivery.

Power Integrity in High-Speed PCB Layouts

Ensuring a stable power delivery in every component in a high-speed printed circuit board is pretty crucial since issues with power integrity tend to compromise the signal integrity of the PCB. Moreover, they also generate unnecessary radiations from buses and interconnects as transient and generate strong oscillations, typically radiating strongly. Therefore, to make sure your high-speed PCB has stable power delivery to every electronic component, you should utilize decoupling capacitor groups which have a specific self-resonance range. Doing so will ensure your PCB design has low impedance when you compare it to the broadest bandwidth possible.

Utilizing ground and power plane pairs on relatively adjacent layers offers additional capacitance, which helps in terms of keeping the impedance of the PDN low.

Advanced Tools that you can use for High-Speed Layout and Design

Using top-tier high-speed printed circuit board designing software will ultimately help you generate impeccable high-speed designs and layouts. Moreover, these software programs bring multiple functionalities and features of making high-quality, high-speed PCB layouts into one application instead of forcing users to utilize different workflow programs to counter various design challenges.

Generally, high-speed printed circuit board layout designers should undertake loads of front-end work to ensure the following:

• Electromagnetic compatibility
• Power integrity
• Signal integrity

Available Options

However, as a high-speed printed circuit board layout designer, you can utilize the perfect high-speed printed circuit board design tool to generate a design that meets the specifications of the client.

Advanced printed circuit board designing software programs can interface with various simulation apps to help users undertake industry-standard analysis. Moreover, some simulation software programs have a unique design that allows them to evaluate power integrity and signal integrity in new designs. Furthermore, these simulation software programs also have the ability to examine electromagnetic interference in a printed circuit board layout.

Simulations come in handy when you are dealing with high-speed printed circuit board designs since they help you pinpoint specific EMI/PI/SI issues before you move on to the next phase. Some crucial examples include locating impedance discontinuities in traces, returning path tracking, and the perfect placement of various decoupling capacitors, which will help you prevent electromagnetic interference.

When experts need to generate advanced high-speed printed circuit board systems while making sure they maintain power and signal integrity, they utilize perfect sets of high-speed layout and design tools. These tools are usually generated on a design engine that is rule driven. This makes them ideal for the job. Moreover, whether you require to generate a layout for a complex mixed-signal or a dense single-board printed circuit board, you can rely on these tools to help you develop the best high-speed printed circuit board layout.

High Speed Printed Circuit Board Design Rules that you should follow

When it comes to generating a high-speed printed circuit board design, there are multiple rules of thumb that you should follow. Here are the most significant rules that you should definitely follow to generate a reliable high-speed printed circuit board layout:

Always keep the Traces Straight and Short whenever possible

Note that straight short traces have minimal time delays. Moreover, these printed circuit boards tend to maintain consistent impedance; therefore, they are perfect for high-speed printed circuit boards.

Avoid 90⁰C Corners

Generally, 90⁰C corners tend to cause impedance discontinuity. That is because 90⁰C corners tend to cause a change in impedance. The change in impedance affects the performance of the printed circuit board negatively. Therefore, you should avoid this corners at all costs.

Lengthen Traces to effectively Equalize Timing Delay

Generally, there are multiple ways to effectively lengthen a circuit board trace to achieve timing differences that are within a particular specification. However, if the length mismatch is tiny, then you can lengthen it by rerouting traces to make them slightly longer.

Achieving the perfect trace length can help you make your high-speed printed circuit board layout more reliable. Therefore, if you are working towards perfection then trace length should be something that you should highly consider.

The 4X Rule

When you are meandering, ensure you follow the popular 4X rule. Meandering simply means routing traces back and forth to lengthen them. When you utilize the 4X rule you will be able to achieve a high speed printed circuit board that is efficient and reliable even when you “meander.”

Conclusion

Generating high-speed printed circuit board layouts is, without a doubt, a challenging task. That is because these types of printed circuit boards include various constraints and characteristics that make them complex to design. Moreover, if you generate them wrongly, they might create a PCB that has power and signal integrity issues. Therefore, you must be extra careful when dealing with these circuit boards. However, if you follow the guidelines in this article, you will have an easy time generating a high-performance and high-quality, high-speed printed circuit board.